The Collaboration Between Synopsys and Intel Foundry for Smartchip Development
In the fast-evolving semiconductor industry, ecosystem collaboration is crucial for driving innovation and meeting market demands. Synopsys and Intel Foundry have embraced their joint collaboration to enhance chip development, focusing on Intel’s 18A and 18A-P process technologies. This partnership aims to streamline and scale next-gen chip design, enabling applications across AI, HPC, data centers, consumer PCs, and mobile platforms. By integrating proven tools and IP from Synopsys, Foundry offers a robust foundation for achieving both performance and efficiency gains.
The announcement emphasizes that the 18A chip process brings groundbreaking semiconductor innovations, including RibbonFET and PowerVia, which significantly improve both performance and power efficiency. These technologies are integral to the design and manufacturing of modern chips at scale. With Foundry’s role, Synopsys ensures that customer needs are met with validated tools and production-ready EDA flows, paving the way for adopting advanced process nodes effectively.
To support this collaboration, Synopsys has certified its digital and analog EDA flows, now ready for production use with the 18A-P variant. This enhancement allows design teams to adopt these nodes seamlessly, reducing the complexity of advanced system-on-chip (SoC) designs and enhancing market adoption across various industries. The availability of validated tools and IP is crucial for reliable dads and reduced risk management, enabling customers to build faster, more efficient chips.
The partnership also integrates the optimized EDA reference flow for Intel’s EMIB-T technology, featuring a 2.5D advanced chip packaging solution. This solution supports 2.5D and 3D high-die architecture exploration andmoments, addressing multi-die integration across packages. This advanced packaging is particularly valuable in AI applications where compute density with better memory proximity boosts performance. A certified EDA flow ensures reduce complexity and supports broader adoption.
Enhancing early design capabilities is another key aspect, with Synopsys and Foundry working together on the early stages of the 14A-E node development. As production becomes more complex and chip hierarchies grow, concurrent design tool and process optimization is essential. Early imposition of validated tools and blankets in 14A-E development ensures that design infrastructure is in place when fully commercialized, aligning with Intel’s broader strategy for a robust ecosystem.
This evolved partnership reflects the growing importance of ecosystem collaboration in the semiconductor industry. It provides a structured pathway for design teams to benefit from integrated, validated solutions, mitigate risks, and shorten development times. Legal, regulatory, and intellectual property considerations are also addressed, highlighting the strategic alignment of Synopsys and Foundry’s efforts with Intel’s goals. The expanded collaboration underscores Intel’s leadership in Next-Gen chip development and its role in shaping a composite ecosystem for fabless Silicon,lda, including those from startups and tech companies.
